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VLSI - Verilog Programming

Three main programming techniques in VLSI Programming are :

1. Gate Level Modelling
2. Data-flow Modelling
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Here you can find Verilog programs of standard Logic Gates, Converter Circuits, Multiplexers, Encoders, Decoders, etc.

Verilog Gate Level Modelling / Structural Modelling:

Verilog Program for AND Gate (Structural / Gate Level Modelling)

Verilog Program for OR Gate (Structural / Gate Level Modelling)

Verilog Program for NOT Gate (Structural / Gate Level Modelling)

Verilog Program for NAND Gate (Structural / Gate Level Modelling)

Verilog Program for NOR Gate (Structural / Gate Level Modelling)

Verilog Program for XOR Gate (Structural / Gate Level Modelling)

Verilog Program for XNOR Gate (Structural / Gate Level Modelling) 

Verilog Program for Half Adder (Structural / Gate Level Modelling)

Verilog Program for Full Adder (Structural / Gate Level Modelling)

Verilog Program for Half Subtractor (Structural / Gate Level Modelling)

Verilog Program for Full Subtractor (Structural / Gate Level Modelling)

Verilog Program for 4-1 MUX (Structural / Gate Level Modelling)

Verilog Program for Binary to Gray Converter (Structural / Gate Level Modelling)

Verilog Program for 2-4 Decoder (Structural / Gate Level Modelling)

Verilog Program for 3-8 Decoder (Structural / Gate Level Modelling)

Verilog Program for 4-2 Encoder (Structural / Gate Level Modelling)



Verilog Dataflow Modelling:

Dataflow Modelling Verilog Codes for Logic Gates: 

Logic Gates

Dataflow Modelling Verilog Codes for Adder and Subtractor:

Half Adder and Full Adder
Half Subtractor
Full Subtractor 
4 Bit Full Adder with Carry Select 

Dataflow Modelling Verilog Codes for Multiplexer and Demultiplexer:

2 to 1 MUX 
4 to 1 MUX
8 to 1 MUX
1 to 2 DEMUX 

Dataflow Modelling Verilog Codes for Logic Converter:

Gray Code to Binary Code Converter
Binary Code to Gray Code Converter
BCD Code to Excess 3 Code Converter
Excess 3 to BCD Code Converter 

Dataflow Modelling Verilog Codes for Logic Decoders and Encoders:

2 to 4 Line Decoder
4 to 2 Encoder

Dataflow Modelling Verilog Codes for Logic Comparators: 

2 Bit Magnitude Comparator


Behavioral Modelling Verilog Codes:

Behavioral Modelling Verilog Codes for Logic Gates:

AND Gate
OR Gate
NOT Gate
NAND Gate
NOR Gate
XNOR Gate
XOR Gate

Behavioral Modelling Verilog Codes for Adder and Subtractor:

Half Adder
Full Adder
Half Subtractor
Full Subtractor
4 Bit Full Subtractor
4 Bit Full Adder

Behavioral Modelling Verilog Codes for Logic Multiplexer and Demultiplexer:

4 to 1 MUX
2 to 1 MUX
8 to 1 MUX 
1 to 4 DMUX
1 to 2 DMUX
1 to 8 DMUX

Behavioral Modelling Verilog Codes for Logic Encoders and Decoders:

3 to 8 Decoder
2 to 4 Decoder
8 to 3 Encoder
4 to 2 Encoder
8 to 3 Priority Encoder 

Behavioral Modelling Verilog Codes for Comparators:

1 Bit Magnitude Comparator
2 Bit Magnitude Comparator
3 Bit Magnitude Comparator 
4 Bit Magnitude Comparator  

Behavioral Modelling Verilog Codes for Converters:

Binary to Gray Converter
Gray to Binary Converter

Behavioral Modelling Verilog Codes for Flip-Flops:

D Flip Flop
T Flip Flop
JK Flip Flop
SR Flip Flop

Behavioral Modelling Verilog Codes for Counters:

4 Bit Counter
BCD Counter (MOD 10 Counter)

Verilog Codes for User Defined Premitives:

UDP of AND Gate
UDP of OR Gate
UDP of D Flip Flop


More Coming Soon...

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