VLSI: 2 Bit Magnitude Comparator Dataflow Modelling
module mag_comp2bit(
input a0,
input a1,
input b0,
input b1,
output p, // p = (a < b)
output r, // r = (a > b)
output q // q = (a = b)
);
assign q = ((~a1) ^ (b1)) & (a0 & b0);
assign p = (((~a1) & b1) | (b0 & (~a0) & (~a1)) | ((~a0) & b1 & b0));
assign r = ((a1 & (~b1)) | ((~b0) & a1 & a0) | (a0 & (~b1) & (~b0)));
endmodule
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