Posts

Showing posts with the label Star

Space Facts: Part 4 - Celestial Dust, Kepler 289

-
1. What is Celestial Dust: Cluster of galaxy: Abell 1698 , A1698-ZD1 galaxy in galaxy cluster of Abel 1698 is full of space dust. Dust is made up of Silicon, Iron, Oxygen, Magnesium, Carbon, etc. Elements and dust are formed in stars by nuclear processes from gases like Helium and Hydrogen. When star dies dust and gases are emitted. So dust was formed only after bigbang happened. 2. Kepler 289 Star: PH3c (Kepler 289c) is a dwarf planet discovered in solar system of PH3 star. PH3c planet has irregular revolution time due to external gravitational force from other planets affecting the planet's revolution. Other planets of that solar-system are PH3b (Kepler 289b) and PH3d (Kelper 289d).  PH3b and PH3d planets are very massive in size as compared to PHc so they pull the planets towards themselves when PH3 passes near them, changing the revolution orbit of PH3c. Astronomers estimate that after millions of years PH3c will be removed outside solar system by gravity-pul...
Post a Comment
Read more

Space Facts: Part 3 - Cheapest Interplanatery Mission, Comets, Magnetic Field, Different types of Stars

-
Cheapest Interplanetary Spacecraft: Mangalyaan Mangalyaan mission cost was 450 Crore Rupees. Rocket: PSLV-C25 Organization: ISRO Mangalyaan spacecraft 150 Crore. Rocket Cost: PSLV-C25: 110 Crore. Weight of Mangalyaan: 1350 Kg, out of 1350 Kg, 500 Kg is weignt of spacecraft and rest is fuel weight. Mangalyaan is also called Mars Orbiter Mission (MOM), Travelled for 25 days around earth changing 6 orbits, and 326 days between Earth and Mars. Comets: Kuiper Belt and Cloud of Urt are home to most of the comets of our solar-sysem. Some well known comets are: 1. Comet Siding Spring: Took a fly-by near Mars on October 19, 2014.  2. Great Comet of 1980 was the first Comet Registered. 3. Haley's Comet: Passes near Earth every 75 years. 4. Comet Shoemaker Levy 9, a comet that ended up clashing with giant Jupiter! It's the first collision ever recorded by any celestial body in our solar system. When this comet was passing nearby Jupiter due to high gravity of plan...
Post a Comment
Read more

Space Facts: Part 1 - Goldilock Zone, Exoplanets, Brown Dwarf and Dwarf Planets

-
Welcome to Stellar Space Stellar Space blog is made to distribute the unknown knowledge regarding space science which we normally don't find in books and also not in any movies. this blog contains many details regarding Planets, stars, Exoplanets, Cosmic voids, Dark matter, Gravitational  waves, Cosmology, Space horizons and many more things. Let's start with Space Fact series... Space Facts: Part 1 1. What is Goldilock Zone: Goldilock zone is also called Habitable Zone. it is the zone in which humans can survive. Earth is situated in Goldilock zone of our solar system. Many other solar systems too have Goldilock Zone. For example Kepler 186F planet is also situated in Goldilock zone of a distant solar system. Space Scientists usually try to find such planets because these planets have maximum possibility of holding life. 2. Exoplanets: Exoplanets are planets which do not reside in any of the solar system and freely wander in universe, certain planets a...
Post a Comment
Read more

Popular posts from this blog

Verilog: 8 to 1 Multiplexer (8-1 MUX) Dataflow Modelling with Testbench Code

-
Image
  Verilog Code for 8 to 1 Multiplexer Dataflow Modelling module mux_8to1(     input a, input b, input c, input D0, input D1, input D2, input D3, input D4, input D5, input D6, input D7, output out, ); module m81( output out, input D0, D1, D2, D3, D4, D5, D6, D7, S0, S1, S2); assign S1bar=~S1; assign S0bar=~S0; assign S2bar=~S2; assign out = (D0 & S2bar & S1bar & S0bar) | (D1 & S2bar & S1bar & S0) | (D2 & S2bar & S1 & S0bar) + (D3 & S2bar & S1 & S0) + (D4 & S2 & S1bar & S0bar) + (D5 & S2 & S1bar & S0) + (D6 & S2 & S1 & S0bar) + (D7 & S2 & S1 & S0); endmodule //Testbench code for 8-1 MUX Dataflow Modelling initial begin // Initialize Inputs a= 0;b = 0;c = 0;D0 = 1;D1 = 0;D2 = 0;D3 = 0;D4 = 0;D5 = 0;D6 = 0;D7 = 0; // Wait 100 ns for global reset to finish #100; // Add stimulus here #100; a = 0;b = 0;c = 1;d0 = ...
Read more

VLSI: 1-4 DEMUX (Demultiplexer) Dataflow Modelling with Testbench

-
Image
Verilog Code for 1-4 DEMUX Dataflow Modelling module demux_1_to_4(     input d,     input s0,     input s1,     output y0,     output y1,     output y2,     output y3     ); assign s1n = ~ s1; assign s0n = ~ s0; assign y0 = d& s0n & s1n; assign y1 = d & s0 & s1n; assign y2 = d & s0n & s1; assign y3 = d & s0 & s1; endmodule //Testbench code for 1-4 DEMUX Dataflow Modelling initial begin                              // Initialize Inputs ...
Read more

VLSI: 4-1 MUX Dataflow Modelling with Testbench

-
Image
Verilog Code for 4-1 MUX Dataflow Modelling module m41(out, i0, i1, i2, i3, s0, s1); output out; input i0, i1, i2, i3, s0, s1; assign y0 = (i0 & (~s0) & (~s1)); assign y1 = (i1 & (~s0) & s1); assign y2 = (i2 & s0 & (~s1)); assign y3 = (i3 & s0 & s1); assign out = (y0 | y1 | y2 | y3); endmodule //Testbench code for 4-1 MUX Dataflow Modelling initial begin                              // Initialize Inputs                              a = 1;b = 0;c = 0;d = 0;s0 = 0;s1 = 0;        ...
Read more

VLSI: Half Subtractor and Full Subtractor Gate Level Modelling

-
Image
Half Subtractor: Verilog Module Code: module half_subtractor (      input  a,      input  b,      output  diff       output  borr ); wire x; xor (diff,a,b); not (x,a); and (borr,x,b); endmodule Full Subtractor: Verilog Module Code: module full_subtractor (      input  a,      input  b,      input  c,      output  diff       output  borr ); wire x,n2,z,n1; xor s1(x,a,b); not s3(n2,x); not s4(n1,c); and s5(y,n1,b); xor s2(diff,a,x); and s6(z,n2,a); or (borr,y,z); endmodule
Read more

Full Subtractor Verilog Code in Structural/Gate Level Modelling with Testbench

-
Image
Verilog Code for Full Subtractor Structural/Gate Level Modelling module  full_sub(borrow,diff,a,b,c); output  borrow,diff; input  a,b,c; wire w1,w4,w5,w6; xor (diff,a,b,c); not n1(w1,a); and a1(w4,w1,b); and a2(w5,w1,c); and a3(w6,b,c); or o1(borrow,w4,w5,w6); endmodule //Testbench code for Full Subtractor Structural/Gate Level Modelling initial  begin // Initialize Inputs a = 0; b = 0; c = 0; // Wait 100 ns for global reset to finish #100; // Add stimulus here #100; a = 0;b = 0;c = 1; #100; a = 0;b = 1;c = 0; #100; a = 0;b = 1;c = 1; #100; a = 1;b = 0;c = 0; #100; a = 1;b = 0;c = 1; #100; a = 1;b = 1;c = 0; #100; a = 1;b = 1;c = 1; end Output: RTL Schematic: Full Subtractor Verilog Other Verilog Programs: Go to Index of  Verilog Programming
Read more